Editors
Louise H. Crockett
Louise was awarded MEng (distinction) and PhD degrees in Electronic and Electrical Engineering, both from the University of Strathclyde, in 2003 and 2008, respectively. She is currently a Senior Teaching Fellow and senior member of the StrathSDR research team where she supervises and manages researchers and key sponsored projects. Her core research interests are in the implementation of DSP systems, FPGAs and SoCs, wireless communications, and SDR. Louise has previously co-authored two books on AMD technology: The Zynq Book (2014), and Exploring Zynq MPSoC (2019). Her teaching focuses on digital systems design targeting FPGA and SoC technology, and builds practical skills to equip graduates for roles in industry.
David Northcote
Received the BEng (Hons) degree in Electronic and Electrical Engineering in 2015. He is currently a Researcher with the Department of Electronic and Electrical Engineering (EEE), University of Strathclyde, supported by AMD. His PhD research was on the efficient implementation of the Hough Transform for embedded vision systems using Zynq MPSoC. David is a co-author of the technical book Exploring Zynq MPSoC. His research interests include efficient implementation of wireless communication and computer vision applications on Zynq, and he has published in IEEE, and at various international conferences over the last 6 years.
Robert (Bob) Stewart
Bob graduated in 1985 with a BSc (Hons) in Electronic Eng., followed by a PhD in Parallel Signal Processing in 1990. He has been an academic at Strathclyde since 1991, where he is currently a Professor, and from 2014-17 was the Department Chair. In his early career he was Design Engineer at Wolfson Microelectronics Ltd, and spent time at USC, University of Minnesota, and as a Visiting Professor at UCLA Extension (until 2017). He was co-founder and CEO of digital communications company, Steepest Ascent Ltd, which was acquired by MathWorks. Bob is head of the StrathSDR team, director of the StrathSDR spin-out company, and has published extensively and led a number of collaborative R&D projects with industry.
Chapter Authors
Douglas Allan
Douglas received his BEng (Hons) and PhD degrees from the University of Strathclyde in 2013 and 2019 respectively. His PhD and post-doctoral research involved development of novel algorithms for detection of OFDM signals in cognitive radio receivers. He has been involved in development of PHY hardware for FPGA and SoC platforms and configuration and deployment of private 5G network solutions for the broadcasting industry. Douglas is a principal SDR design engineer with Neutral Wireless Ltd in Glasgow, and also a research engineer with the StrathSDR team.
Ehinomen Atimati
Atimati is a PhD researcher with the StrathSDR team at the University of Strathclyde. Her current work, supported by Schlumberger Faculty for the Future (FFTF), is focused on exploring reinforcement learning techniques in improving coexistence management within Dynamic Spectrum Access networks. Her interests are in exploring artificial intelligence-driven shared spectrum wireless communication systems for inclusive connectivity. She has several years of international teaching experience in Electrical/ Electronic Engineering and is passionate about increased participation of females in STEM.
Kenneth W. Barlee
Kenny received BEng (Hons) and PhD degrees from the University of Strathclyde in 2014 and 2020 respectively. His PhD research presented FBMC-based real-time cognitive SDR transceivers that targeted vacant spectrum implemented on Zynq devices. He has worked on 5G NSA/SA network design, on the UK Government funded 5GRuralFirst and 5G NewThinking projects, where he led on RF network design and implementation of vRAN and distributed cloud + edge core networks. Kenny is a research engineer with the StrathSDR team and is also a principal 5G RAN design engineer with Neutral Wireless Ltd.
Lewis J. Brown
Lewis was awarded the MEng (Distinction) in Electronic and Electrical Engineering from the University of Strathclyde in 2020. Since 2020 he has been working on his PhD with the StrathSDR research group. In 2021, he completed an internship with AMD, where he developed embedded hardware systems and performed initial bring-up for RFSoC evaluation boards with the PYNQ team. Previously he was also an intern at Xilinx in Edinburgh. His core research interests involve reconfigurable, hardware-based implementations of 5G New Radio (5G NR) standards, focusing on RFSoC design.
James Craig
James received the MEng (Distinction) in Electronic and Electrical Engineering with International Study from the University of Strathclyde in 2021. Since then, he has been working as a PhD researcher with the StrathSDR research group. He has completed two internships at MathWorks Ltd in 2021 and 2022 with the Wireless HDL and Wireless Testbench teams. His research involves investigating 5G New Radio (NR) standard algorithms and how these can be effectively implemented on FPGAs and SoCs, with a focus on Multiple-Input Multiple-Output (MIMO) techniques.
Graeme Fitzpatrick
Graeme received the MEng (Distinction) in Electronic and Electrical Engineering from the University of Strathclyde in 2020. He is currently a PhD researcher with the StrathSDR research group. Graeme has core research interests in radio spectrum regulation and the hardware solutions that make up Dynamic Spectrum Access (DSA) techniques. The focus of his research is investigating the potential of the dynamic partial reconfiguration of FPGAs for SDR systems. Mainly, this involves using Dynamic Function eXchange (DFX) controlled via PYNQ Composable Overlays for communications solutions on the RFSoC.
Joshua Goldsmith
Josh received his BEng (Hons) degree from the University of Strathclyde in 2017, where he is currently completing his PhD degree. Integrated with his academic research, Josh completed two internships in 2019 and 2021 at Xilinx (now AMD) developing hardware systems and training material for the RFSoC. He is also a contributing author of the Exploring Zynq MPSoC book and has published a number of journal papers. His research is focused on run-time reconfigurable hardware, specifically for FPGA radio applications, and he has related interests in signal processing and embedded systems.
Andrew Maclellan
Andrew was awarded the MEng (Distinction) in Electronic and Electrical Engineering at the University of Strathclyde in 2018. He joined the StrathSDR research group in 2018 to pursue a PhD and has progressed three internships at MathWorks in 2017, 2018, and 2019 working with the Wireless HDL team. In 2020/21, he also interned at AMD in the PYNQ research team, working on the bring-up of the RFSoC 2×2 board, and experimental PYNQ features. His core research interests are in Deep Learning for Physical Layer Wireless Communications and developing FPGA Deep Learning architectures for communications SoCs.
Lewis D. McLaughlin
Lewis was awarded MEng (Distinction) in Electronic and Electrical Engineering from the University of Strathclyde in 2018. Since graduating, he has been pursuing his PhD within the StrathSDR research group. Between 2019 and 2020 Lewis completed an internship with AMD in Colorado, developing embedded hardware systems, performing development board bring-up and investigating design toolflows within the PYNQ team. His research interests include abstracted hardware design automation, communications channel emulation and short-wordlength architectures for FPGAs including RFSoC.
Blair McTaggart
Blair was awarded his MEng degree in Electronic and Electrical Engineering from the University of Strathclyde in 2018. He is currently working on his PhD with the StrathSDR research group and his research is supported by UK government funding and contracts on SDR systems. Specifically his work has focussed on the design a configurable, real-time FPGA implementation of a multi-element adaptive beamformer, using the QR algorithm. He has also developed an automatic tool that will rapidly build and implement QR based adaptive beamforming designs for an array of different antenna or FPGA characteristics.
Tawachi Nyasulu
Tawachi received the PhD degree from University of Strathclyde in 2022 and previously the MSc (Eng) degree from University of Leeds in 2015. She is currently a researcher with the StrathSDR team in the Department of Electronic and Electrical Engineering, University of Strathclyde and is supported and engaged with the Scotland 5G Centre as part of the Wave 1 Rural Testbed projects. Her research is focused on 5G PLMN/SNPN for rural/offshore connectivity and IoT solutions, modelling techniques for spectrum sharing and coexistence management, and business models for community-led network projects.
Marius Šiaučiulis
Obtained the degree of BEng (Hons) in Electronic and Electrical Engineering from the University of Strathclyde in 2019. Since then, he has pursued PhD research on 5G implementation using SDR with the support of AMD and the CENSIS (Scotland’s national centre for sensing, imaging and IoT). His research interests include embedded software aspects of SDR design, high speed interfacing, and design tool development including PYNQ and GNU Radio. Marius has previously undertaken internships working with the MathWorks Glasgow office in 2019, and more recently with Xilinx in 2021.
David Crawford
David has received BSc (Hons), MSc, PhD, and MBA degrees from the University of Strathclyde. After spending several years in industry, he returned to Strathclyde in 2011 to run the then newlyformed Centre for White Space Communications, working closely with industry partners to investigate techniques and novel approaches for affordable Internet connectivity in hard-to-reach areas. He currently leads the 5G project activities of the StrathSDR team. A key aspect of this work involves spectrum sharing and affordable access to spectrum for use in under-served, difficult-to-reach areas using private 5G.